A. Field of the Invention
The present invention relates to a semiconductor device and manufacturing method thereof, and in particular, relates to a diode used in a power source circuit, power conversion device, or the like, and to a manufacturing method thereof.
B. Description of the Related Art
Rectifier diodes utilizing a p-n junction of a silicon semiconductor are widely used, and in a high frequency switching application in particular, fast recovery diodes are widely used. These diodes are formed of a p-type anode layer and n-type cathode layer, and of an n-type drift layer (as this has a lower concentration than the anode and cathode layers, it is also called an i-layer or intrinsic region) for maintaining breakdown voltage at a high level, and exhibit rectifying characteristics owing to a p-n junction of the anode layer and drift layer. Furthermore, fast reverse recovery characteristics are obtained by introducing a transition metal into the drift layer, forming recombination centers, and controlling minority carrier lifetime. B (boron) is mainly used for the p-type anode layer, P (phosphorus) for the n-type drift layer, and P, As (arsenic), Sb (antimony), or the like, for the n-type cathode layer. Au (gold), Pt (platinum), Fe (iron), or the like, is used as the transition metal.
Also, as heretofore known technology, a p-n junction formation method that is not influenced by a p-type impurity diffusion method using boron has been proposed (JP-A-2002-231968). A sectional view of a typical example thereof is shown in FIGS. 24A and 24B. It is widely known that Pt diffused inside an n-type semiconductor substrate 21 and an n-type drift layer 22 has a U-shaped concentration distribution that segregates to the front surface or rear surface of the substrate, as shown in FIG. 27, and transition metals other than platinum are also distributed in the same way. The high concentration Pt segregated to the silicon surface becomes an acceptor, compensating the concentration of the n-type drift layer. For this reason, the n-type silicon surface inverts to a p-type, forming a p-type inversion region 44. The diode of FIGS. 24A and 24B utilizes the heretofore known p-type inversion region 44 that has inverted to the p-type in a p-type anode layer 45. According to this method, there is an advantage in that it is easily possible to form the p-type layer without introducing a heretofore known dopant impurity (B, aluminum, or the like) that becomes an acceptor, or diffusing at a temperature of 1,000° C. or more. Also, the Pt in the silicon surface vicinity is taken into a silicon oxide film 25 through a silicon (Si)-silicon oxide (SiO2) film interface. As a result of this, as the Pt concentration in the silicon surface vicinity directly below the silicon oxide film 25 decreases, it is possible to selectively form a p-n junction in the aperture portion of the silicon oxide film 25.
A description will be given, using FIGS. 25A to 25E, of steps of manufacturing the diode of FIGS. 24A and 24B. FIGS. 25A to 25E are a flow diagram of steps for manufacturing the structure of FIGS. 24A and 24B. The silicon oxide film 25 for a boron ion implantation for forming a p-type guard ring region 53 is formed (FIG. 25A), and the p-type guard ring region 53 is formed with a boron ion implantation and a high temperature diffusion at 1,000° C. or more (FIG. 25B). Continuing, a region of the silicon oxide film 25 in which platinum is to be diffused is opened, a silica paste 30 including Pt is applied to the rear surface, and the Pt is diffused at a temperature on the order of 900° C. (FIG. 25C). When the Pt is diffused, the heretofore known p-type inversion region 44 is formed (FIG. 25D). Subsequently, an anode 26 and a cathode 27 are formed (FIG. 25E).
When using the method described in JP-A-2002-231968 of forming the p-n junction formation with a Pt diffusion, as previously described, the p-n junction is formed by a compensatory effect of the concentration of the Pt that has become an acceptor segregated to the silicon surface and the n-type impurity concentration in the n-type drift layer 22. For this reason, being affected by inconsistency in the Pt concentration profile in the silicon after diffusion, caused by inconsistency in conditions in the Pt diffusion step, there is a tendency for the depth of the p-n junction and the p-layer carrier concentration distribution to be unstable. In particular, when the n-type impurity concentration of the n-type drift layer is high (for example, in the case of a diode for a rated voltage in the 150 to 200 V class), the compensatory effect of the Pt that has become an acceptor becomes weak, meaning that the instability of the p-layer carrier concentration is marked. As the p-layer becomes the p-type anode layer, as previously described, there is a considerable effect on electrical characteristics such as breakdown voltage or leakage current when a reverse bias voltage is applied, or implantation efficiency when a forward bias voltage is applied. Therefore, as the p-type anode layer concentration distribution is unstable with the heretofore described manufacturing method, there is a problem in that the electrical characteristics fluctuate considerably.
Also, in comparison with a normal p-type diffusion layer formed by B or the like, the p-type anode layer formed from the heretofore known p-type inversion region 44 formed by the Pt acceptor transition has a smaller diffusion depth, and the concentration also tends to be lower. For this reason, the electric field intensity increases in the p-type anode layer in the vicinity of the oxide film aperture end portion when there is a reverse bias, and the breakdown voltage may decrease markedly. The reason for this is as follows. When B, which is normally used as an acceptor, is diffused, the form of the p-n junction in the end portion of the oxide film aperture portion formed on the surface layer of the silicon substrate, owing to diffusion thereof in a horizontal direction, becomes a cylindrical form or a spherical form. For this reason, when a reverse bias is applied to the p-n junction and a depletion layer spreads, the electric field intensity increases more in the end portion of the p-type anode layer, in accordance with the curvature radius thereof, than in a portion in which the p-n junction is flat (hereafter called a flat junction). As it is sufficient to increase the curvature radius of the p-n junction in order to suppress the increase in electric field intensity, it is sufficient in the case of B to increase the diffusion temperature, or increase the diffusion time. However, in the case of the p-type anode layer formed with the method using the Pt acceptor transition, the diffusion depth is small. This is because, while the thermal diffusion of B in silicon is a replacement type, Pt has an interstitial diffusion type, meaning that the diffusion coefficient of Pt is on the order of ten times greater than that of B at the same diffusion temperature. Therefore, Pt spreads through the whole of the depth direction of the silicon substrate in a short time and, when ignoring the segregation to the substrate surface layer, the Pt concentration distribution is virtually flat. Therefore, the curvature radius of the p-type anode layer horizontal direction diffusion portion is extremely small in comparison with a normal diffusion with B. As a result of this, the electric field intensity of the end portion of the p-type anode layer is liable to increase when there is a reverse bias, and a problem occurs in that the breakdown voltage of the element decreases, or the leakage current is unstable.
A method of countering the breakdown voltage decrease caused by the curvature radius of the p-n junction in the end portion of the p-type anode layer is described in JP-A-2002-231968. That is, as shown in FIGS. 24A and 24B, the end portion of the p-type anode layer 45 formed by the Pt acceptor transition is covered by a p-type guard ring region 53 which is deeper than the p-type anode layer 45. By so doing, it is possible to keep the electric field intensity of the end portion of the p-type anode layer 45 low. However, with this method, it is necessary to selectively form a p-type region (a guard ring, or the like), using B rather than Pt, in a region differing from the region in which the p-type anode layer formed by the Pt acceptor transition is formed. That is, the number of photolithography steps increases. With the manufacturing method illustrated in FIGS. 25A to 25E, a total of at least three photolithography steps are necessary, and three photomasks are needed. In accordance with the leaning toward energy saving in recent years, a reduction in steps and necessary materials is required in the diode fabrication process also. Therefore, in order to achieve a significant process contraction with the heretofore described manufacturing method, a review of the p-n junction formation method itself is essential.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.